1. Field of the Invention
The present invention is related to a liquid crystal display. More particularly, the present invention provides a liquid crystal display to enhance the uniformity of the sealant.
2. Description of the Prior Art
In the fabrication process of the Thin Film Transistor-Liquid Crystal Display TFT-LCD, the control of sealing width and cell gap has great influence on the final product quality.
The sealant surrounding the panel is to bond the upper and lower substrates. Normally, the material of the sealant is doped with some spacers to provide the supporting force for the upper and lower substrates. Because the spacer has a grain shape, it is easy to cause the unequal cell gap once the spacers are clustered in the alignment and press process. The unequal cell gap only needs a few micrometers to induce an inhomogeneous distribution of electrical field, so as to deteriorate the gray level performance of the liquid crystal.
If the sealing width is too narrow, it will have several problems such as the bad outagassing in the sequential alignment and press process, the incomplete filling of liquid crystal, the non-uniformity of the cell gap, or the blank frame phenomenon in some region of the sealant frame, etc. If the sealing width is too wide, the dicing difficulty will be increased by several reasons such as the sealant peeling during the spreading of the alignment film, or the pollution to the liquid crystal owing to the sealant is too close to the display region, etc.
Consequently, the stability of the sealing width and the control of the cell gap are the important issues that need to be faced and improved in the fabrication process of TFT-LCD. The Japan patent JP-11-223841 discloses a method of improving the uniformity of the cell gap, which sets up a dummy pattern of the sealant in the edge of the display panel. In the array-side substrate, the dummy pattern is set on the source line and the opposite side of source. In the CF-side substrate, the dummy pattern is set in the position corresponding to the array electrode. Besides, the U.S. Pat. No. 6,018,380 discloses the way to overcome the sealant pollution of the display region is suggested in the prior art, that the substrate can be dug trenches or blocked an extrusion to prevent the sealant from flowing into the display region.
Generally, for monitoring the condition of the sealant spreading, the metal layer in the TFT-side that is passed by the sealant is often dug holes or trenches, so called the sealant observation windows. The light irradiates the TFT-side substrate, and then passes through the liquid crystal layer to the black matrix (BM) of the CF-side substrate. The purpose of monitoring the condition of the sealant spreading is achieved by observing some of the light reflected to the TFT-side. The FIG. 1A and FIG. 1B are the partial schematic diagrams of the sealant observation windows for monitoring the condition of the sealant spreading. The FIG. 1A shows that the sealant observation windows 100 can be set up as the opened holes or the trenches with long shape to observe the sealant 200. Because the total width “D” of the sealant observation windows 100 is normally a little wider than the width “d” of the sealant, the sealant 200 will diffuse toward both the two ends of the sealant observation windows 100 during the press process. The inner spacer of the sealant 200 is easy to accumulate in the corner “A” to form a thicker cell gap, so as to cause the unequal cell gap. Furthermore, referring to the FIG. 1B, the permutation of the sealant observation windows in the prior art is equal spaced and parallel. It is unable to observe the spreading condition when the sealant 200 is shifted or its edge happens to locate in the region “B” between each the sealant observation windows.